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LTC1391 8-Channel Analog Multiplexer with Cascadable Serial Interface
FEATURES
s s s s s s s s s s
DESCRIPTION
The LTC (R) 1391 is a high performance CMOS 8-to-1 analog multiplexer. It features a serial digital interface that allows several LTC1391s to be daisy-chained together, increasing the number of MUX channels available using a single digital port. The LTC1391 features a typical RON of 45, a typical switch leakage of 50pA and guaranteed break-beforemake operation. Charge injection is 10pC maximum. All digital inputs are TTL and CMOS compatible when operated from single or dual supplies. The inputs can withstand 100mA fault current. The LTC1391 is available in 16-pin PDIP, SSOP and narrow SO packages. For applications requiring 2-way serial data transmission, see the LTC1390 data sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Low RON: 45 Single 2.7V to 5V Supply Operation Analog Inputs May Extend to Supply Rails Low Charge Injection Serial Digital Interface Low Leakage: 5nA Max Guaranteed Break-Before-Make TTL/CMOS Compatible for All Digital Inputs Cascadable to Allow Additional Channels Can Be Used as a Demultiplexer
APPLICATIONS
s s s
Data Acquisition Systems Communication Systems Signal Multiplexing/Demultiplexing
TYPICAL APPLICATION
3V, 8-Channel 12-Bit ADC
0.1F OPTIONAL A/D INPUT FILTER 3V
300
1 2 3 ANALOG INPUTS 4 5 6 7 8
S0 S1 S2 S3 S4 S5 S6 S7 LTC1391
3 4
6 5
ON-RESISTANCE ()
DOUT DIN CS CLK GND DATA IN CLK CS DATA OUT
16 V+ 15 D - 14 V 13 12 11 10 9
1 2
VREF +IN
VCC
8 7
1F
250 200 150 100 50
CLK LTC1285 -IN DOUT GND CS/SHDN
SERIAL INTERFACE TO MUX AND ADC
1391 TA01
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On-Resistance vs Analog Input Voltage
TA = 25C V + = 2.7V V - = 0V
V + = 5V V - = -5V
0 -5 -4 -3 -2 -1 0 1 2 3 ANALOG INPUT VOLTAGE (V)
4
5
1391 TA02
1
LTC1391
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW S0 1 S1 2 S2 3 S3 4 S4 5 S5 6 S6 7 S7 8 16 V + 15 D 14 V - 13 DOUT 12 DIN 11 CS 10 CLK 9 GND
Total Supply Voltage (V + to V -) .............................. 15V Input Voltage Analog Inputs ................... (V - - 0.3V) to (V + + 0.3V) Digital Inputs ......................................... - 0.3V to 15V Digital Outputs ..........................- 0.3V to (V + + 0.3V) Power Dissipation.............................................. 500mW Operating Temperature Range LTC1391C ............................................... 0C to 70C LTC1391I........................................... - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1391CGN LTC1391CN LTC1391CS LTC1391IGN LTC1391IN LTC1391IS GN PART MARKING 1391 1391I
GN PACKAGE N PACKAGE 16-LEAD PLASTIC SSOP 16-LEAD PDIP S PACKAGE 16-LEAD PLASTIC SO
TJMAX = 125C, JA = 110C/ W (GN) TJMAX = 125C, JA = 70C/ W (N) TJMAX = 125C, JA = 100C/ W (S)
Consult factory for Military grade parts.
V + = 5V, V - = - 5V, GND = 0V, TA = operating temperature range, unless otherwise specified.
SYMBOL PARAMETER Switch VANALOG Analog Signal Range RON On-Resistance CONDITIONS (Note 2) VS = 3.5V ID = 1mA
q
ELECTRICAL CHARACTERISTICS
MIN -5
TYP
MAX 5 75 75 120
UNITS V % %/C nA nA nA nA nA nA V V A V V V MHz ns ns ns dB pC
TMIN 25C TMAX
45 20 0.5 0.05
q
IS(OFF) ID(OFF) ID(ON) Digital VINH VINL IINL, IINH VOH VOL Dynamic fCLK tON tOFF tOPEN OIRR QINJ
RON vs VS RON vs Temperature Off Input Leakage Off Output Leakage On Channel Leakage
VS = 4V, VD = - 4V, VS = - 4V, VD = 4V Channel Off VS = 4V, VD = - 4V, VS = - 4V, VD = 4V Channel Off VS = VD = 4V Channel On V + = 5.25V V + = 4.75V VIN = 5V, 0V V + = 4.75V, IO = - 10A IO = - 360A V + = 4.75V, IO = 1.6mA (Note 2) VS = 2.5V, RL = 1k, CL = 35pF VS = 2.5V, RL = 1k, CL = 35pF
0.05
q
0.05
q q q q q q
5 20 5 20 5 20
High Level Input Voltage Low Level Input Voltage Input Current High Level Output Voltage Low Level Output Voltage Clock Frequency Enable Turn-On Time Enable Turn-Off Time Break-Before-Make Interval Off Isolation Charge Injection
2.4 0.8 5 2.4 4.74 4.50 0.5
0.8 5 400 200
35 VS = 2VP-P, RL = 1k, f = 100kHz RS = 0, CL = 1000pF, VS = 1V (Note 2)
260 100 155 70 2
10
2
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LTC1391
ELECTRICAL CHARACTERISTICS
V + = 5V, V - = - 5V, GND = 0V, TA = operating temperature range, unless otherwise specified.
SYMBOL Dynamic CS(OFF) CD(0FF) Supply I+ I- PARAMETER Input Off Capacitance Output Off Capacitance Positive Supply Current Negative Supply Current All Logic Inputs Tied Together, VIN = 0V or 5V All Logic Inputs Tied Together, VIN = 0V or 5V
q q
CONDITIONS
MIN
TYP 5 10 15 - 15
MAX
UNITS pF pF
40 - 40
A A
V + = 2.7V, V - = GND = 0V, TA = operating temperature range, unless otherwise specified.
SYMBOL PARAMETER Switch VANALOG Analog Signal Range RON On-Resistance CONDITIONS (Note 2) VS = 1.2V IO = 1mA
q
MIN 0
TYP
MAX 2.7 300 300 350
UNITS V % %/C nA nA nA nA nA nA V V A V V V V MHz ns ns ns dB pC pF pF A
TMIN 25C TMAX
250 20 0.5 0.05
q
IS(OFF) ID(OFF) ID(ON) Digital VINH VINL IINL, IINH VOH VOL Dynamic fCLK tON tOFF tOPEN QIRR QINJ CS(OFF) CD(OFF) Supply I+
RON vs VS RON vs Temperature Off Input Leakage Off Output Leakage On Channel Leakage
VS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3) Channel Off VS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3) Channel Off VS = VD = 0.5V, 2.5V (Note 3) Channel On V + = 3.0V V + = 2.4V VIN = 2.7V, 0V V + = 2.7V, IO = - 20A IO = - 400A V + = 2.7V, IO = 20A IO = 400A (Note 2) VS = 1.5V, RL = 1k, CL = 35pF (Note 4) VS = 1.5V, RL = 1k, CL = 35pF (Note 4) (Note 4) VS = 2VP-P, RL = 1k, f = 100kHz RS = 0, CL = 1000pF, VS = 1V (Note 2)
0.05
q
0.05
q q q q q q
5 20 5 20 5 20
High Level Input Voltage Low Level Input Voltage Input Current High Level Output Voltage Low Level Output Voltage
2.0 0.8 5 2.0 2.68 2.30 0.01 0.20
0.8 5 800 400
Clock Frequency Enable Turn-On Time Enable Turn-Off Time Break-Before-Make Interval Off Isolation Charge Injection Input Off Capacitance Output Off Capacitance Positive Supply Current
125
490 190 290 70 1 5 10 0.2
5
All Logic Inputs Tied Together, VIN = 0V or 2.7V
q
2
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: Guaranteed by Design. Note 3: Leakage current with a single 2.7V supply is guaranteed by correlation with the 5V leakage current specifications. Note 4: Timing specifications with a single 2.7V supply are guaranteed by correlation with the 5V timing specifications.
3
LTC1391 TYPICAL PERFORMANCE CHARACTERISTICS
On-Resistance vs Temperature
300 250 V + = 2.7V V - = 0V VS = 1.2V
200 150 100 50 0 -40 V + = 5V V - = -5V VS = 0V
OUTPUT VOLTAGE (V)
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 V + = 5V V- = -5V
OUTPUT VOLTAGE (V)
ON-RESISTANCE ()
-20
20 40 60 0 TEMPERATURE (C)
Driver Output High Voltage vs Output Current
0 -0.5 V + = 2.7V V - = 0V
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
-1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 2.0 2.5 3.0 3.5 4.0 OUTPUT VOLTAGE (V) TA =25C 4.5 5.0
1391 G04
PIN FUNCTIONS
S0, S1, S2, S3, S4, S5, S6, S7 (Pins 1, 2, 3, 4, 5, 6, 7, 8): Analog Multiplexer Inputs. GND (Pin 9): Digital Ground. Connect to system ground. CLK (Pin 10): System Clock (TTL/CMOS Compatible). The clock synchronizes the channel selection bits and the serial data transfer from DIN to DOUT. CS (Pin 11): Channel Select Input (TTL/CMOS Compatible). A logic high on this input enables the LTC1391 to read in the channel selection bits and allows digital data transfer from DIN to DOUT. A logic low on this input puts DOUT into three-state and enables the selected channel for analog signal transmission. DIN (Pin 12): Digital Input (TTL/CMOS Compatible). Input for the channel selection bits. DOUT (Pin 13): Digital Output (TTL/CMOS Compatible). Output from the internal shift register. V - (Pin 14): Negative Supply. D (Pin 15): Analog Multiplexer Output. V + (Pin 16): Positive Supply.
4
UW
80
1391 G01
Driver Output Low Voltage vs Output Current
1.2 1.1 1.0 0.9 TA = 25C V + = 2.7V V - = 0V
0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15
Driver Output Low Voltage vs Temperature
V + = 5V V - = -5V IO = 1.8mA
V + = 2.7V V - = 0V IO = 400A
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OUTPUT CURRENT (mA)
1391 G02
0.10 -40
-20
40 60 0 20 TEMPERATURE (C)
80
1391 G03
Driver Output High Voltage vs Temperature
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -40 -20 40 60 0 20 TEMPERATURE (C) 80
1391 G05
V + = 5V V - = -5V IO = 1.6mA
V + = 5V V - = -5V
V + = 2.7V V - = 0V IO = 400A
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LTC1391
APPLICATIONS INFORMATION
Multiplexer Operation Figure 1 shows the block diagram of the components within the LTC1391 required for MUX operation. The LTC1391 uses DIN to select the active channel and the chip select input, CS, to switch on the selected channel as shown in Figure 2. When CS is high, the input data on the DIN pin is latched into the 4-bit shift register on the rising clock edge. The input data consists of the "EN" bit and a string of three bits for channel selection. If "EN" bit is logic high as illustrated in the first input data sequence, it enables the selected channel. After the clocking in of the last channel selection bit B0, the CS pin must be pulled low before the next rising clock edge to ensure correct operation. Once CS is pulled low, the previously selected channel is switched off to ensure a break-before-make interval. After a delay of tON, the selected channel is switched on allowing signal transmission. The selected channel remains on until the next falling edge of CS. After a delay of tOFF, the LTC1391 terminates the analog signal transmission and allows the
CLK DIN CS CONTROL LOGIC 4-BIT SHIFT REGISTER
ANALOG INPUTS (S0 TO S7)
MUX BLOCK
ANALOG OUTPUT (D)
1391 * F01
Figure 1. Simplified Block Diagram of the MUX Operation
CLK
CS
DIN
EN HIGH
B2
B1
B0
ANY ANALOG INPUT
D t ON t OFF
1391 * F02
Figure 2. Multiplexer Operation
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selection of next channel. If the "EN" bit is logic low, as illustrated in the second data sequence, it disables all channels and there will be no analog signal transmission. Table 1 shows the various bit combinations for channel selection.
Table 1. Logic Table for Channel Selection
ACTIVE CHANNEL All Off S0 S1 S2 S3 S4 S5 S6 S7 EN 0 1 1 1 1 1 1 1 1 B2 X 0 0 0 0 1 1 1 1 B1 X 0 0 1 1 0 0 1 1 BO X 0 1 0 1 0 1 0 1
Digital Data Transfer Operation The block diagram of Figure 3 shows the components within the LTC1391 required for serial data transfer. When CS is held high, data is fed into the 4-bit shift register and then shifted to DOUT. Data appears at DOUT after the fourth rising edge of the clock as shown in Figure 4. The last four
CLK DIN CS CONTROL LOGIC 4-BIT SHIFT REGISTER DOUT
1391 F03
Figure 3. Simplified Block Diagram of the Digital Data Transfer Operation
EN LO
B2
B1
B0
5
LTC1391
APPLICATIONS INFORMATION
bits clocked into the LTC1391 shift register before CS is taken low select the MUX channel that is turned on. This allows a series of devices, with the DOUT of one device connected to the DIN of the next device, to be programmed with a single data stream.
CLK 1 2 3 4
DIN
D1
D2
D3
D4
D5
DOUT
D1
D2
D3
D4
Figure 4. Digital Data Transfer Operation
Multiplexer Expansion Several LTC1391s can be daisy-chained to expand the number of multiplexer inputs. No additional interface ports are required for the expansion. Figure 5 shows two LTC1391s connected at their analog outputs to form a 16-to-1 multiplexer at the input to an LTC1400 A/D converter.
5V 0.1F 0.1F OPTIONAL A/D INPUT FILTER -5V 0.1F
1 2 3 ANALOG INPUTS 4 5 6 7 8
S0 S1 S2 S3 S4 S5 S6 S7
V+ D V-
16 15 14 13
+
10F
6 5
DOUT LTC1391 12 DIN A 11 CS 10 CLK 9 GND
1 2 3 ANALOG INPUTS 4 5 6 7 8
S0 S1 S2 S3 S4 S5 S6 S7
V+ D V-
16 15 14
13 DOUT LTC1391 12 DIN B 11 CS 10 CLK 9 GND
Figure 5. Daisy-Chaining Two LTC1391s for Expansion
6
+
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D5
1391 * F04
To ensure that only one channel is switched on at any one time, two sets of channel selection bits are needed for DATA as shown in Figure 6. The first data sequence is used to switch off one MUX and the second data sequence is used to select one channel from the other MUX or vice versa. In other words, if bit "ENA" is high and bit "ENB" is low, one channel of MUX A is switched on and all channels of MUX B are switched off. If bit "ENA" is low and bit "ENB" is high, all channels at MUX A are switched off and one channel of MUX B is switched on. Care should be taken to ensure that only one LTC1391 is enabled at any one time to prevent two channels from being enabled simultaneously.
CLK 1 2 3 4 5 6 7 8
CS
DIN
ENA
A2
A1
A0
ENB
B2
B1
B0
1391 * F06
Figure 6. Data Sequence for MUX Expansion
5V 10F
+
1 2
VCC AIN
VSS
8 7 10F
CONV LTC1400 3 VREF CLK 0.1F 4 GND DOUT
-5V 0.1F
DATA OUT
DATA IN CS CLK
1391 * F05
LTC1391
TYPICAL APPLICATIONS
Daisy-Chaining Five LTC1391s
0.1F BYPASS CAPACITORS FROM V + TO GND FOR EACH LTC1391 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 1 2 3 ANALOG INPUTS 4 5 6 7 8 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 V+ D 16 15 1 2 3 VREF +IN VCC 8 5V 0.1F
V LTC1391 13 DOUT A 12 DIN 11 CS 10 CLK 9 GND V+ D 16 15
LTC1391 13 DOUT B 12 DIN 11 CS 10 CLK 9 GND V+ D 16 15
V LTC1391 13 DOUT C 12 DIN 11 CS 10 CLK 9 GND V+ D 16 15
14 V- LTC1391 13 DOUT D 12 DIN 11 CS 10 CLK 9 GND V+ D 16 15
LTC1391 13 DOUT E 12 DIN 11 CS 10 CLK 9 GND
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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7 CLK LTC1286 6 -IN DOUT 4 5 CS GND
DATA OUT
14 V-
- 14
14 V-
DATA IN CS CLK
1391 TA04
7
LTC1391
PACKAGE DESCRIPTION
0.015 0.004 x 45 (0.38 0.10) 0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270) 0 - 8 TYP
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.300 - 0.325 (7.620 - 8.255)
0.130 0.005 (3.302 0.127) 0.015 (0.381) MIN
0.009 - 0.015 (0.229 - 0.381)
(
+0.025 0.325 -0.015 +0.635 8.255 -0.381
)
0.125 (3.175) MIN
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254)
0.053 - 0.069 (1.346 - 1.752) 0 - 8 TYP
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
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Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 - 0.196* (4.801 - 4.978) 0.053 - 0.068 (1.351 - 1.727) 0.004 - 0.0098 (0.102 - 0.249) 16 15 14 13 12 11 10 9
0.009 (0.229) REF
0.008 - 0.012 (0.203 - 0.305)
0.0250 (0.635) BSC
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
GN16 (SSOP) 1098
1
23
4
56
7
8
N Package 16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770* (19.558) MAX 16 15 14 13 12 11 10 9
0.045 - 0.065 (1.143 - 1.651)
0.065 (1.651) TYP 0.005 (0.127) MIN 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076)
0.255 0.015* (6.477 0.381)
1
2
3
4
5
6
7
8
N16 0695
S Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 - 0.394* (9.804 - 10.008) 16 0.004 - 0.010 (0.101 - 0.254) 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 15 14 13 12 11 10 9
0.050 (1.270) TYP
1
2
3
4
5
6
7
8
S16 0695
LTC1391
TYPICAL APPLICATION
Interfacing LTC1391 with LTC1257 for Demultiplex Operation
1 2 3 ANALOG OUTPUTS 4 5 6 7 8
S0 S1 S2 S3 S4 S5 S6 S7 LTC1391
TTL COMPATIBLE AT V + = 5V
RELATED PARTS
PART NUMBER LTC1285 LTC1286 LTC1390 LTC1451 LTC1452 LTC1453 DESCRIPTION 3V 12-Bit ADC 5V 12-Bit ADC Serial-Controlled 8-to-1 Analog Multiplexer 5V 12-Bit DAC 5V and 3V 12-Bit DAC 3V 12-Bit DAC COMMENTS Micropower, Auto Shutdown, SO-8 Package, SPI, QSPI + MICROWIRETM Compatible Micropower, Auto Shutdown, SO-8 Package, SPI, QSPI + MICROWIRE Compatible Low RON, Bidirectional Serial Interface, Low Power, 16-Pin SO Complete VOUT DAC, SO-8 Package, Daisy-Chainable, Low Power Multiplying VOUT DAC, SO-8 Package, Rail-to-Rail Output, Low Power Complete VOUT DAC, SO-8 Package, Daisy-Chainable, Low Power
MICROWIRE is a trademark of National Semiconductor.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
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V+ D
16 15 47k 0.1F
5V V + 12V
14 V- DOUT DIN CS CLK GND DATA CLK CS 13 12 11 10 9
OPTIONAL D/A OUTPUT FILTER 1 2 CLK DIN VCC 8 0.1F
7 VOUT LTC1257 6 3 LOAD VREF 5 4 DOUT GND
1391 TA03
1391f, sn1391 LT/GP 0896 7K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1995
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